Most microcontrollers frequently deal with bits of data rather than bytes. There are many occasions where performing a particular operation in a bit of data in a memory location is more convenient than operating on the entire byte. It allows designers to be more resource optimum and reduce unnecessary overhead.
The MCS-51 was one of the first microcontrollers to have a dedicated boolean architecture which was responsible for making it exceptionally fast when it came to processing a single bit.
To support these bit-wise operations the data memory of the 8051 (20H-2FH) is both bit and byte-addressable as we saw in the post on general memory structure of 8051. Moreover, a number of special function registers in the RAM memory space are bit addressable which makes the life of the programmer so much easier.
The CY flag of the PSW register can be considered ground zero for all the bit-wise operations accounting for its extensive use during boolean operations in 8051.
Now that we have seen the rest of the instruction groups in this 8051 course, we will specifically single out and enlist all of them that classify under boolean/bit-wise operations and are capable of working on single bits of data.
Operation | Mnemonics | Description |
Clear
|
CLR C | [CY]<-0 |
CLR Address | [Address]<-0 | |
Complement
|
CPL C | [CY]<-[CY]’ |
CPL Address | [Address]<-[Address]’ | |
Setting value
|
SETB C | [CY]<-1 |
SETB Address | [Address]<-1 | |
AND
|
ANL C, Address | [CY]<-[CY] AND [Address] |
ANL C, /Address | [CY]<-[CY] AND [Address]’ | |
OR
|
ORL C, Address | [CY]<-[CY] OR [Address] |
ORL C, /Address | [CY]<-[CY] OR [Address]’ | |
Move
|
MOV C, Address | [CY]<-[Address] |
MOV Address,C | [Address]<-[CY] | |
Jump
|
JC Address | Jump to address if [C]=1 |
JNC Address | Jump to address if [C]=0 | |
JNB Address, Address | Jump to destination address if source address =0 | |
JB Address, Address | Jump to destination address if source address =1 | |
JBC Address, Address | Jump to destination address if source address =1 and sets carry flag to 0 |
Let’s take a more in-depth look into each of these bit-wise operations.
Contents
Clear operation
The clear operation is used to clear the data bit at a particular address or in the carry flag.
Opcode
|
Operand
|
Description
|
Size
|
Execution Time
|
Flags affected | ||
Carry | Overflow | Auxilary carry | |||||
CLR
|
C | Clears the data stored in the CY flag of the accumulator | 1 byte | 12 clock cycles | set to 0 | Unaffected | Unaffected |
Address | Clears the data bit stored at a particular address | 2 bytes | 12 clock cycles | Unaffected | Unaffected | Unaffected |
An explanation for the size of an instruction
Any instruction in the 8051 microcontroller consists of two parts; an opcode and operand. As the 8051 has an 8-bit architecture each opcode is 8 bit in size (1 byte) but the size of instructions increases due to the size of the operands. In some cases, operands take no space whereas in some they can take up to 2 bytes of space (See the post on addressing modes in 8051 for more details on the cases where instruction size increases due to operands.)
Let us look at an example to understand the above-mentioned concept.
The instruction CLR C is one byte in size as the opcode itself is enough to describe the instruction. But in the case of CLR 02H, the microcontroller needs two bytes to store the instruction as the opcode takes 1 byte and the address takes another.
In some cases this size increases to 3 bytes, this happens in the case of jump instructions where a relative address is also given to the microcontroller.
Examples
CLR C; Clears the data in the CY flag of the PSW register CLR P1.7; Clears the bit at port 1.7
Complement instruction
Opcode
|
Operand
|
Description
|
Size
|
Execution Time
|
Flags affected | ||
Carry | Overflow | Auxilary carry | |||||
CPL
|
C | Complements the data stored in the CY flag of the accumulator | 1 byte | 12 clock cycles | Affected | Unaffected | Unaffected |
Address | Complements the data bit stored at a particular address | 2 bytes | 12 clock cycles | Unaffected | Unaffected | Unaffected |
Examples
CPL C; Complements the value stored in the carry flag CPL TF1; Complements the TF1 flag in TCON register
Set operation
Opcode
|
Operand
|
Description
|
Size
|
Execution Time
|
Flags affected | ||
Carry | Overflow | Auxilary carry | |||||
SETB
|
C | Sets the data stored in the CY flag of the PSW register to 1 | 1 byte | 12 clock cycles | 1 | Unaffected | Unaffected |
Address | Sets the data bit stored at a particular address to 1 | 2 bytes | 12 clock cycles | Unaffected | Unaffected | Unaffected |
SETB C; Sets the value in the carry flag to 1 SETB TR1; Sets the value of TR1 flag in TCON register to 1(used to start the timer)
AND Operation
Opcode
|
Operand
|
Description
|
Size
|
Execution Time
|
Flags affected | ||
Carry | Overflow | Auxilary carry | |||||
ANL
|
C, Address | Performs AND operation between the data stored in the carry flag and the given address | 2 byte | 24 clock cycles | Affected | Unaffected | Unaffected |
C, /Address | Performs AND operation between the data stored in the carry flag and the complement of the data at any given address | 2 bytes | 24 clock cycles | Unaffected | Unaffected | Unaffected |
Examples
ANL C, 09H ANL C, /05H
OR Operation
Opcode
|
Operand
|
Description
|
Size
|
Execution Time
|
Flags affected | ||
Carry | Overflow | Auxilary carry | |||||
ORL
|
C, Address | Performs OR operation between the data stored in the carry flag and the given address | 2 byte | 24 clock cycles | Affected | Unaffected | Unaffected |
C, /Address | Performs OR operation between the data stored in the carry flag and the complement of the data at any given address | 2 bytes | 24 clock cycles | Unaffected | Unaffected | Unaffected |
Examples
ORL C, 09H ORL C, /07H
MOV Operation
Opcode
|
Operand
|
Description
|
Size
|
Execution Time
|
Flags affected | ||
Carry | Overflow | Auxilary carry | |||||
MOV
|
C, Address | Moves data from a particular address to the carry flag | 2 byte | 12 clock cycles | Unaffected | Unaffected | Unaffected |
Address,C | Moves data from the carry flag to a particular address | 2 bytes | 24 clock cycles | Unaffected | Unaffected | Unaffected |
Examples
MOV C, 09H ORL 06H, C
Jump Operations
Any computing device performs operations in a sequential manner but in some cases, operations need to be performed in the form of a branch. There are a number of jump instructions which are used to perform this kind of branching, let us have a look at them.
Opcode
|
Operand
|
Description
|
Size
|
Execution Time
|
Flags affected | ||
Carry | Overflow | Auxilary carry | |||||
JC | Address/label | This instruction transfers the control to the specified address/label if the carry flag has the value 1. | 2 bytes | 24 clock cycles | Unaffected | Unaffected | Unaffected |
JNC | Address/label | This instruction transfers the control to the specified address/label if the carry flag has the value 0. | 2 bytes | 24 clock cycles | Unaffected | Unaffected | Unaffected |
JNB | Address, Address | This instruction transfers the control to the destination address if the source address has the bit 0. | 3 bytes | 24 clock cycles | Unaffected | Unaffected | Unaffected |
JB | Address, Address | This instruction transfers the control to the destination address if the source address has the bit 1. | 3 bytes | 24 clock cycles | Unaffected | Unaffected | Unaffected |
JBC | Address, Address | This instruction transfers the control to the destination address if the source address has the bit 1. This instruction clears the carry flag as well | 3 bytes | 24 clock cycles | Unaffected | Unaffected | Unaffected |
Example
MOV TMOD , #10H ;The value 10H is 00010000B and selects mode 1 of timer 1 MOV R3 , #200H ;used as a counter to create a delay of 14 seconds AGAIN : MOVTL1 , #08H ;sets the value of 08H in the lower bit of timer 1 and the again keyword helps to create a loop. MOV TH1 , #01H ;sets the value of 01H in the lower bit of timer 1 SETB TR1 ;turns on the timer BACK: JNB TF1, BACK ;checks the TF1 flag in TCON register continuously to know if overflow has occurred or not CLR TR1 ;clears TR1 flag to stop the timer CLR TF1 ;clears overflow bit as the timer is reset DJNZ R3, AGAIN ;keeps looping the statements after again keyword till the value in R3 reduces to 0. DJNZ command decreases the value in r3 and checks if it zero