Contents
What are Logic Instructions?
Logical instructions of a microprocessor are simply the instructions that carry out basic logical operations such as OR, AND, XOR, and so on. In Intel’s 8085 microprocessor, the destination operand for the instructions is always the accumulator register. Here, the logical operations work on a bitwise level. The corresponding result is also stored in the accumulator register.
Let’s take a look at the summary of all the logical instructions before we take a closer look at each of them.
| Operation | Instruction | Description |
|
AND
|
ANA R | [A] <- [A] ^ [R] |
| ANA M | [A] <- [A] ^ [[HL]] | |
| ANI data | [A] <- [A] ^ data | |
|
OR
|
ORA R | [A] <- [A] V [r] |
| ORA M | [A] <- [A] V [[HL]] | |
| ORI data | [A] <- [A] V data | |
|
Ex-OR
|
XRA R | [A] <- [A] ⊕ [R] |
| XRA M | [A] <- [A] ⊕ [[HL]] | |
| XRI data | [A] <- [A] ⊕ data | |
|
Complement
|
CMA | [A] <- [A] |
| CMC | [CY] <- [CY] | |
| Set | STC | [CY] = 1 |
|
Compare
|
CMP R |
[A] – [r]; affects flags
|
| CMP M |
[A] – [[HL]]; affects flags
|
|
| CPI data |
[A] – data; affects flags
|
|
|
Rotate
|
RLC | [Dn+1] <- [Dn] [D0] <- [D7] [CY] <- [D7] |
| RRC | [Dn-1] <- [Dn] [D7] <- [D0] [CY] <- [D0] | |
| RAL | [Dn+1] <- [Dn] [CY] <- [D7] [D0] <- [CY] | |
| RAR | [Dn-1] <- [Dn] [CY] <- [D0] [D7] <- [CY] |
Compare Instructions
CMP
| The Opcode | The Operands | Description |
|
CMP |
R |
Compare register with accumulator [A] – [R] |
|
M |
Compare contents of the memory location pointed by the HL pair (M) with the contents of the accumulator [A] – [[HL]] |
The contents of a register or any memory location pointed by the HL pair (M) are compared with the contents stored in the accumulator register. The contents of both the operand and accumulator are well-preserved. The consequence of running this instruction can be seen on the PSW, where if the contents of the accumulator are
- lesser than the contents of a register/memory location, then the Carry flag is set.
- equal to the contents of a register/memory location, then the Zero flag is set.
- greater than the contents of a register/memory location, then both the Carry flag and Zero flag are reset.
Size of instruction
1 byte
Addressing mode
CMP R – Register; CMP M – Indirect
Flags affected
Carry flag, Zero flag
Example
- CMP B
- CMP 1008H
CPI
|
The Opcode |
The Operand |
Description |
|
CPI |
8-bit immediate data |
Compare immediate data with accumulator [A] – Data |
An immediate 8-bit data value is compared with the contents stored in the accumulator register. The contents of both the operand and accumulator are well-preserved. The consequence of running this instruction can be seen on the PSW, where if the contents of the accumulator are
- lesser than the 8-bit immediate data, then the Carry flag is set.
- equal to the 8-bit immediate data, then the Zero flag is set.
- greater than the 8-bit immediate data, then both the Carry flag and Zero flag are reset.
Size of instruction
1 byte
Addressing mode
Immediate
Flags affected
Carry flag, Zero flag
Example
- CPI 100H
AND Logic Instructions
ANA
| The Opcode | The Operands | Description |
|
ANA |
R |
Logical AND the register with accumulator [A] <- [A] ^ [R] |
|
M |
Logical AND the contents pointed by the memory address pointed by the HL pair (M) with the contents of the accumulator [A] <- [A] ^ [[HL]] |
The contents of a register or any memory location are logically ANDed with the contents stored in the accumulator register. The resulting answer is saved in the accumulator. If the operand happens to be a memory location, then its address is mentioned by the contents of the H-L pair.
The consequence of running this instruction can be seen on the PSW, where the Sign Flag, Zero Flag, and Parity Flag is affected. The Carry flag is reset, whereas the Auxillary Carry flag is set.
Size of instruction
1 byte
Addressing mode
ANA R – Register; ANA M – Indirect
Flags affected
All flags
Example
- ANA B
- ANA 2000H
ANI
|
The Opcode |
The Operand |
Description |
|
ANI |
8-bit immediate data |
Logically AND immediate data with accumulator [A] <- [A] ^ Data |
The ANI instruction works exactly like the ANA instruction but performs logical AND of 8-bit immediate value with the contents of the accumulator register.
Size of instruction
2 bytes
Addressing mode
Immediate
Flags affected
All flags
Example
- ANI 35H
XOR Logic Instructions
XRA
| The Opcode | The Operands | Description |
|
XRA |
R |
Logical XOR the register with accumulator [A] <- [A] ⊕ [R] |
|
M |
Logical XOR the contents of the memory address pointed by the HL pair (M) with the contents of the accumulator [A] <- [A] ⊕ [[HL]] |
The contents of a register or any memory location are logically XORed with the contents stored in the accumulator register. The resulting answer is saved in the accumulator. If the operand happens to be a memory location, then its address is mentioned by the contents of the H-L pair.
The consequence of running this instruction can be seen on the PSW, where the Sign Flag, Zero Flag, and Parity Flag is affected. The Carry flag is reset, whereas the Auxillary Carry flag is set.
Size of instruction
1 byte
Addressing mode
XRA R – Register; XRA M – Indirect
Flags affected
All flags
Example
- XRA B
- XRA 1200H
XRI
|
The Opcode |
The Operand |
Description |
|
XRI |
8-bit immediate data |
Logically XOR immediate data with accumulator [A] <- [A] ⊕ Data |
The XRI instruction works exactly like the XRA instruction but performs logical XOR of 8-bit immediate value with the contents of the accumulator register.
Size of instruction
2 bytes
Addressing mode
Immediate
Flags affected
All flags
Example
- XRI 82H
OR Logic Instructions
ORA
| The Opcode | The Operands | Description |
|
ORA |
R |
Logical OR the register with accumulator [A] <- [A] V [R] |
|
M |
Logical OR the contents of the memory location pointed by the HL pair (M) with the contents of the accumulator [A] <- [A] V [[HL]] |
The contents of a register or any memory location are logically ORed with the contents stored in the accumulator register. The resulting answer is saved in the accumulator. If the operand happens to be a memory location, then its address is mentioned by the contents of the H-L pair.
The consequence of running this instruction can be seen on the PSW, where the Sign Flag, Zero Flag, and Parity Flag is affected. The Carry flag is reset, whereas the Auxillary Carry flag is set.
Size of instruction
1 byte
Addressing mode
ORA R – Register; ORA M – Indirect
Flags affected
All flags
Example
- ORA B
- ORA 7580H
ORI
|
The Opcode |
The Operand |
Description |
|
ORI |
8-bit immediate data |
Logically OR immediate data with accumulator [A] <- [A] V Data |
The ORI instruction works exactly like the ORA instruction but performs logical OR of 8-bit immediate value with the contents of the accumulator register.
Size of instruction
2 bytes
Addressing mode
Immediate
Flags affected
All flags
Example
- ORI 455H
Rotate Instructions
RLC
|
The Opcode |
The Operand |
Description |
|
RLC |
None |
Rotate Accumulator Left [Dn+1] <- [Dn] [D0] <- [D7] [CY] <- [D7] |
The RLC instruction causes each binary bit in the accumulator register to be rotated by one position to its left. The MSB value is shifted to the LSB as well as the Carry Flag in the PSW. The other PSW bits, such as S, Z, P, or AC, are not affected by this operation.
Size of instruction
1 byte
Addressing mode
Implicit
Flags affected
Carry flag
Example
- RLC
RRC
|
The Opcode |
The Operand |
Description |
|
RRC |
None |
Rotate Accumulator Right [Dn-1] <- [Dn] [D7] <- [D0] [CY] <- [D0] |
The RRC instruction causes each binary bit in the accumulator register to be rotated by one position to its right. The LSB value is shifted to the MSB as well as the Carry Flag in the PSW. The other PSW bits, such as S, Z, P, or AC, are not affected by this operation.
Size of instruction
1 byte
Addressing mode
Implicit
Flags affected
Carry flag
Example
- RRC
RAL
|
The Opcode |
The Operand |
Description |
|
RAL |
None |
Rotate Accumulator Left including the Carry [Dn+1] <- [Dn] [CY] <- [D7] [D0] <- [CY] |
The RAL instruction causes each binary bit in the accumulator register to be rotated by one position to its left through the carry flag as well. The MSB value is shifted to the Carry Flag, and the Carry Flag in the PSW is shifted to the LSB. The other PSW bits, such as S, Z, P, or AC, are not affected by this operation.
Size of instruction
1 byte
Addressing mode
Implicit
Flags affected
Carry flag
Example
- RAL
RAR
|
The Opcode |
The Operand |
Description |
|
RAR |
None |
Rotate Accumulator Right including the Carry [Dn-1] <- [Dn] [CY] <- [D0] [D7] <- [CY] |
The RAR instruction causes each binary bit in the accumulator register to be rotated by one position to its right through the carry flag as well. The LSB value is shifted to the Carry Flag, and the Carry Flag in the PSW is shifted to the MSB. The other PSW bits, such as S, Z, P, or AC, are not affected by this operation.
Size of instruction
1 byte
Addressing mode
Implicit
Flags affected
Carry flag
Example
- RAR
Complement Instructions
CMA
|
The Opcode |
The Operand |
Description |
|
CMA |
None |
Complement Accumulator [A] <- [A] |
Size of instruction
1 byte
Addressing mode
Implicit
Flags affected
None
Example
- CMA
CMC
|
The Opcode |
The Operand |
Description |
|
CMC |
None |
Complement Carry Flag [CY] <- [CY] |
The CMC instruction complements the Carry Flag bit. The other PSW bits, such as S, Z, P, or AC, are not affected by this operation.
Size of instruction
1 byte
Addressing mode
Implicit
Flags affected
Carry Flag
Example
- CMC
Set Instruction
STC
|
The Opcode |
The Operand |
Description |
|
STC |
None |
Set Carry Flag [CY] = 1 |
The STC instruction sets the Carry Flag bit to 1. The other PSW bits, such as S, Z, P, or AC, are not affected by this operation.
Size of instruction
1 byte
Addressing mode
Implicit
Flags affected
Carry Flag
Example
- STC
Simulation using the Sim8085 Emulator
All the example codes in this 8085 course have been executed in an online development environment called Sim8085. It is a simple environment that is really user-friendly for beginners. You can write codes for Intel’s 8085 microprocessor, debug the assembly code, and then simulate the 8085 microprocessor. We’ve covered a tutorial on using the Sim8085 emulator in the data transfer instructions post here. You can check out the Sim8085 emulator here
Let us walk through the simulator with our code.
Assembly Language Programming Using Logic Instructions
We shall now see an Assembly Language Programme using these instructions and see how these instructions are put to use.
Consider the given problem statement. Let us write a program to compare two numbers and store the greater value in a different memory location.
LDA 5729H MOV B,A LDA 5739H CMP B JNC JUMP MOV A,B JUMP:STA 5749H HLT
Let us go through the step by step analysis of our program.
-
LDA 5729H
The value stored in the 5729H memory location is loaded into the accumulator register.
-
MOV B, A
This loaded number is moved to register B.
-
LDA 5739H
The second number stored in 5739H memory location is loaded in the accumulator register.
-
CMP B
The number stored in register B is compared with the one stored in the accumulator register.
-
JNC JUMP
If no carry is generated, jump to the JUMP label.
-
MOV A, B
If a carry value is generated, i.e., if the Carry Flag Bit is set, then move the number stored in the register B to the accumulator.
-
JUMP: STA 5749H
Whichever number is present in the accumulator is the larger of the two numbers.
-
HLT
Once the program has served its purpose, you halt/end the program using the HLT condition.
