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# Digital Electronics Quiz | MCQs | Interview Questions

1. How many flip-flops are required to make a MOD-32 binary counter?

2. A MOD-16 ripple counter is holding the count 10012. What will the count be after 31 clock pulses?

3. The circuit shown below is a _______.

4. Two cascaded decade counters will divide the input frequency by ________.

5. Any divide-by-N counter can be formed by using external gating to ________ at a predetermined number.

6. The final count of a modulus-11 binary counter is ________.

7. When two counters are cascaded, the overall MOD number is equal to the ________ of their individual MOD numbers.

8. A BCD counter is a ________.

9. The flip-flops of a 4-bit ripple counter have a propagation delay from clock to Q output of 10 ns, each. For the counter to recycle from 1111 to 0000, it takes a total of ________.

10. Which of the following statements are true regarding a synchronous up/down counter?

11. The delay problems encountered with asynchronous counters are removed with synchronous counters because the:

12. Which is not an example of a truncated modulus?

13. _____ counter is a type of a shift register counter.

14. The resolution of an n bit DAC with a maximum input of 5 V is 5 mV. The value of n is …….

15. If A=B=D=0, and C=1, the value at OUT will be?

16. A ______ enables us to display a BCD code on a seven-segment display.

17. If a BCD to seven-segment decoder sends 0111 to a seven-segment display, the segments that will go LOW are:

18. _______ is the basic memory unit in digital electronics and hold 1-bit of data.

19. We can use _______ and _______ to make a full adder

20. (7BF)16 = (?)2

21. (?)8 = (E8)16

22. The decimal equivalent of the 2's complement of 11100101 is _________.

23. Find Q

24. Select the Universal Logic gates from the following options

25. Asynchronous circuits that change state immediately when enabled are called __________.

26. We can erase the contents of an EPROM by exposing it to ________.

27. This digital logic family has the lowest power dissipation

28. Select the volatile memories from the list below:

29. How many select lines will a 32 to 1 multiplexer will have

30. The logic realized in the digital electronic circuit below is:

31. The simplest PLD is

32. The greatest negative number which can be stored in an 8-bit computer using 2’s complement arithmetic is ________.

33. The address inputs and data outputs of a 16K x 14 memory chip are ______.

34. A PLA can be used

35. Synchronous counters are slower than ripple counters.

36. The circuit shown below is _________.

37. In any Master-Slave configuration of flip-flops (D/T/JK/SR)

38. We use a dual-slope ADC in a digital voltmeter because

39. How many types of digital comparators exist?

40. The decimal number 10 is represented in its BCD form as _______.

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